# RA Family (/integration/chip_vendors/renesas/ra_family)



Supported boards in the RA Family:

* **EK-RA8D1**
* **EK-RA8P1**
* **EK-RA6M3G**
* **EK-RA8D2**

Run the Project [#run-the-project]

<Steps>
  <Step>
    **Install e² studio**: The official IDE of Renesas is called e² studio. Because it's Eclipse-based,
    it runs on Windows, Linux, and Mac as well.

    Members of the RA family require certain versions of the Flexible Software Package (FSP). See the
    individual `README.md` files in the applicable repositories for info. FSPs can be downloaded
    [here](https://www.renesas.com/us/en/software-tool/flexible-software-package-fsp).

    Note that from FSP version 6.0 and above LVGL is part of the middleware section of the components.
    Therefore, when cloning the latest versions of the supported LVGL board repositories, recursive
    updating of the git submodules is no longer needed.
  </Step>

  <Step>
    **Install J-Link**: J-Link is used for debugging, it can be downloaded
    [here](https://www.segger.com/downloads/jlink/).
  </Step>

  <Step>
    **Clone the project**: Clone the ready-to-use repository of your selected board.

    For FSP versions prior to 6.0 the submodules are needed as well:

    ```bash title="bash" lineNumbers=1
    git clone https://github.com/lvgl/lv_port_renesas_ek-ra8d1_gcc.git --recurse-submodules
    ```

    Downloading the `.zip` from GitHub doesn't work as it doesn't download the submodules.

    For FSP version 6.0 and above a simple clone is enough:

    ```bash title="bash" lineNumbers=1
    git clone https://github.com/lvgl/lv_port_renesas_ek-ra8d1_gcc.git
    ```
  </Step>

  <Step>
    **Import the project**: Open e² studio, go to `File` -> `Import project` and select
    `General` / `Existing projects into workspace`. Select the cloned folder and press `Finish`.
  </Step>

  <Step>
    **Generate the project content**: Double-click on `configuration.xml`. This will activate the
    `Configuration Window`.

    Renesas' Flexible Software Package (FSP) includes BSP and HAL layer support extended
    with multiple RTOS variants and other middleware stacks. The components will be
    available via code generation, including the entry point in `main.c`.

    Press `Generate Project Content` in the top right corner.

    <Figure src="/_static/images/renesas/generate.png" alt="Code generation with FSP" caption="Code generation with FSP" />
  </Step>

  <Step>
    **Build the project**: Press <Kbd>Ctrl</Kbd> + <Kbd>Alt</Kbd> + <Kbd>B</Kbd>.
  </Step>

  <Step>
    **Start debugging**: Click the Debug button.

    If prompted with `Debug Configurations`, on the `Debugger` tab select `J-Link ARM` as
    `Debug hardware` and the proper IC as `Target Device`:

    * `R7FA8D1BH` for EK-RA8D1
    * `R7FA6M3AH` for EK-RA6M3G

    <Figure src="/_static/images/renesas/debug_ra8.png" alt="Debugger parameters for RA8" caption="Debugger parameters for the EK-RA8D1" />

    <Figure src="/_static/images/renesas/debug_ra6.png" alt="Debugger parameters for RA6" caption="Debugger parameters for the EK-RA6M3G" />
  </Step>
</Steps>

<Callout type="info">
  On EK-RA8D1 boards, the `SW1` DIP switch 7 (in the middle of the board) should be
  ON, all others are OFF.

  Also note that opening a project previously built on top of an FSP prior to v6.0 will trigger
  a dialog asking whether you want to migrate to the new FSP v6.0. The migration will
  not break the project.
</Callout>

Modify the Project [#modify-the-project]

Open a demo [#open-a-demo]

The entry point of the main task is contained in `src/LVGL_thread_entry.c`.

You can disable the LVGL demos (or just comment them out) and call some
`lv_example_...()` functions, or add your own custom code.

Configuration [#configuration]

`src/lv_conf.h` (or `src/lv_conf_user.h`) contains the most important settings for LVGL. Namely:

* <ApiLink name="LV_COLOR_FORMAT_DEFAULT" /> to set the color format LVGL renders in
* <ApiLink name="LV_MEM_SIZE" /> to set the maximum RAM available to LVGL
* <ApiLink name="LV_USE_DRAW_DAVE2D" /> to enable the [Dave2D GPU](/integration/chip_vendors/renesas/dave2d_gpu)

Hardware and software components can be modified in a visual way using the
`Configuration Window`.

As of e² studio 2025-04.1 and FSP 6.0.0, LVGL is a managed component.

Common Issues [#common-issues]

Missing Smart bundle [#missing-smart-bundle]

When you start debugging you might get an error saying that a Smart bundle was not found.
To fix it, in the project properties go to `C/C++ Build / Refresh Policy`. You should see a
different project name there than yours. Just delete it and add your project.

<Figure src="/_static/images/renesas/resource_config_for_smart_bundle.png" alt="Fixing the missing Smart bundle error in the Refresh Policy settings" caption="Fixing the missing Smart bundle error in the Refresh Policy settings" />

The application crashes immediately [#the-application-crashes-immediately]

Sometimes when you start debugging, the application jumps to weird addresses even without
reaching the `main` function.

To solve it, in the Debug perspective right-click on the debug session and click `Restart`.

The application crashes immediately or when a new screen is created [#the-application-crashes-immediately-or-when-a-new-screen-is-created]

Probably the FreeRTOS stack size is too small. Open `configuration.xml`, search for
`rtos.awsfreertos.thread.stack` and set it to at least `16384`. It should be enough for a
typical application, but for a complex one you might need to go higher.

After that, in e² studio double-click `configuration.xml` and select `Generate Project Content`.

Support [#support]

In case of any problems or questions open an issue in the corresponding repository.